1. Field of the Invention
This invention relates to an active matrix type liquid crystal display apparatus and, more particularly, it relates to an active matrix type liquid crystal display apparatus having a plurality of vertical signal lines and a plurality of switching transistors arranged for the liquid crystal device of each pixel.
2. Related Background Art
Known methods developed in recent years for driving liquid crystal display apparatus to display images include simple matrix drive methods typically to be conducted in a TN display mode, an STN display mode or a ferroelectric liquid crystal display mode, di-terminal type active matrix drive methods using MIMs or diodes and tri-terminal type active matrix drive methods using a-Si TFTs or poly-Si TFTS.
Meanwhile, known methods for driving liquid crystal panels include line-sequential scanning methods adapted to rewrite the voltage of all the pixels of a row in a single horizontal scanning period and dot-sequential scanning methods adapted to serially rewrite the voltage of each pixel. When a liquid rystal panel is driven by a DC voltage, electrochemical reactions are apt to occur in the liquid crystal material, the oriented film and/or the interface thereof to degrade the quality of the displayed image. A technique of polarity inversion of data signals or that of applying an AC to drive the liquid crystal panel is popularly used to avoid this problem. The AC drive technique utilizes both a line inversion system of inverting the polarity on a scanning line by scanning line basis and a field inversion system of inverting the polarity on a field by field basis in order to prevent inter-frame flickers and inter-line flickers from taking place.
FIG. 6 of the accompanying drawings schematically illustrates a circuit diagram of a pixel of a known active matrix circuit. Referring to FIG. 6, there are shown a vertical signal line 61, a scanning line 62 and a switching pixel transistor 63. Reference symbol Cadd denotes a holding capacitance and reference symbol LC denotes liquid crystal. Note that the switching pixel transistor 63 is an n-channel type transistor. A known active matrix circuit having the above described configuration is accompanied by the problems as pointed out below because the pixel transistor 63 is an n-channel type transistor.
The AC drive technique is normally used in liquid crystal display apparatus in order to prevent degradation (the sticking phenomenon) of the liquid crystal LC of the apparatus. Then, the image signal applied thereto can show either a positive polarity or a negative polarity relative to the middle potential as shown in FIG. 7A and hence it is required to have a large amplitude. Then, as shown in FIG. 7B, the pulse of the scanning line 62 is required to have an even larger amplitude obtained by adding an amplitude corresponding to a threshold value of transistor 63 to that of the image signal. Furthermore, the apparent threshold value of the transistor 63 is raised as the source potential of the transistor 63 rises because of the back bias effect. Then, the amplitude of the pulses of the scanning line 62 becomes even larger if the biasing effect is taken into consideration so that consequently a high supply voltage is required to drive the circuit. The use of such a high voltage inevitably raise the power consumption rate.
FIG. 8 schematically illustrates a circuit diagram of a pixel of another known active matrix circuit. Referring to FIG. 8, the pixel comprises a signal line 61, a scanning line 64, a scanning line inverse relative to the scanning line 65, an n-channel type pixel transistor 66, a p-channel type pixel transistor 67, a holding capacitance Cadd and liquid crystal LC. With such a circuit configuration, no additional amplitude corresponding to a threshold value is required and hence it suffices that the scanning line 64 has an amplitude substantially same as that of the image signal applied thereto because the ON-state resistance of the n-channel type transistor 67 is raised while that of the p-channel type transistor 66 is lowered in a range where the signal voltage is high, whereas the ON-state resistance of the n-channel type transistor 66 is lowered while that of the p-channel type transistor 67 is raised in a range where the signal voltage is low so that a constant ON-state resistance is realized over the entire range of change of the signal voltage.
In the above described active matrix circuit, both the n-channel type transistor 66 and the p-channel type transistor 67 are turned on simultaneously under any circumstances. However, it is sufficient to turn on only the p-channel type transistor 67 when an image signal (with a positive polarity) having a voltage higher than the middle potential is written onto a pixel and only the n-channel type transistor 66 when an image signal (with a negative polarity) having a voltage lower than the middle potential is written onto a pixel. It is not desirable to turn on the two transistors simultaneously from the viewpoint of reducing the power consumption rate.
FIG. 9A shows a circuit diagram of a circuit adapted to transfer a signal to vertical signal lines 90, 91. Referring to FIG. 9A, image signal (1) is fed to polarity inversion circuit 81, which forwards the signal to common communication signal line 87 to turn on/off CMOS transfer switches 83, 84 according to control signals 88, 89 from horizontal scanning circuit 82 and by way of inverters 85, 86 so that the image signal is output to vertical signal lines 90, 91 in an alternate fashion.
Now, as described above, a signal having its polarity inverted regularly and periodically has to be fed to the vertical signal lines 90, 91. Referring to FIG. 9B, the image signal (1) is transformed to show a waveform illustrated by (3) according to a polarity inversion signal INV (2). For the reason described above by referring to FIG. 8, CMOS transfer switches are preferably used for the transfer switches 83, 84 so that the signal may be transferred without losing its amplitude. Thus, with any of the above described known techniques, a complicated signal processing circuit is required to invert an image signal according to a polarity inversion signal INV (2) and, additionally, CMOS transfer switches have to be used for the transfer switches 83, 84 to consequently increase the circuit size.